1. Field of the Invention
This invention relates to a plasma addressing display device having a display cell and a plasma cell overlapped together. More particularly, it relates to a plasma cell scanning circuit structure and to a plasma cell scanning method.
2. Description of Related Art
A plasma addressing display device is disclosed in, for example, Japanese Laid-Open Patent H-4-265931. The plasma addressing display device has a flat panel structure comprising a display cell 1, a plasma cell 2 and a common intermediate sheet 3 interposed therebetween, as its structure is shown in FIG. 1. The intermediate sheet 3 is e.g., a glass plate of extremely thin thickness and is termed a micro-sheet. The plasma cell 2 is formed by a lower glass substrate 4 bonded to the intermediate sheet 3 and a dischargeable gas is charged in a gap in-between. On the inner surface of the lower glass substrate 4 A, there are formed striped discharge electrodes.
These discharge electrodes operate as anodes A and cathodes K Since the discharge electrodes can be printed on the flat glass substrate 4 by e.g., a screen printing method, superior productivity and operability can be assured. A number of partiyions 7 are formed so that a set of the anode A and the cathode K is delimited by two neighboring partitions 7 to constitute plural discharge channels 5 by dividing the gap in which is sealed a dischargeable gas.
These partitions 7 also can be fabricated by a screen printing method, with the upper ends of the partitions 7 bearing against a surface of the intermediate sheet 3. Plasma discharge is produced across the anode A and the cathode K of respective opposite polarities in a discharge channel 5 surrounded by the neighboring partitions 7. Meanwhile, the intermediate sheet 3 and the lower glass substrate 4 are bonded together by e.g., glass frit.
On the other hand, the display cell 1 is fabricated using a transparent upper glass substrate 8. This glass substrate 8 is bonded to the opposite side surface of the intermediate sheet 3 via a pre-set gap using e.g., a sealing material in a gap of the display cell 1 is sealed a liquid crystal 9 as an opto-electric material. On the inner surface of the upper glass substrate 8 are formed plural signal electrodes Y. On intersections of the signal electrodes Y and the discharge channels 5 are formed matrix-shaped pixels.
On the inner surface of the glass substrate 8 are also formed color filters 13 for allocating, e.g., three prime colors R, G and B to respective pixels. The flat panel of the above-described structure is of the transparent type and the plasma cell 2 is positioned at the incident side, whilst the display cell 1 is positioned on the exiting side. A backlight 12 is mounted on the side of the plasma cell 2.
In the plasma addressing display device, column-shaped discharge channels 5, in which occurs plasma discharge, arc line-sequentially scanned in a switching fashion. In synchronism with this scanning, picture signals are applied to the column-shaped signal electrodes Y on the display cell side to execute display driving.
When plasma discharge occurs in the discharge channels 5, the inside thereof is at a uniform anode potential such that pixels are selected on the row basis. That is, each discharge channel 5 corresponds to a scanning line, and operates as a sampling switch. If, with the plasma sampling switch on, picture signals are applied to the respective signal lines, sampling takes place to control pixel on/off.
The pixel signals are held in the pixels unchanged even after the plasma sampling switch is turned off. The display cell 1 is responsive to the pixel signals to modulate the incident light from the backlight 12 into outgoing light to display a picture.
FIG. 2. schematically shows only two pixels. FIG. 2 shows only two signal electrodes Y1, Y2, a sole cathode K1 and a sole anode A1 to aid in the understanding. Each pixel 11 is of a layered structure comprising signal electrodes Y1, Y2, a liquid crystal 9, an intermediate sheet 3 and a discharging channel. During plasma discharge, the discharge channel is connected to substantially an anode potential. If, in this state, picture signals are applied to the respective signal electrodes Y1, Y2, electrical charges are injected into the liquid crystal 9 and the intermediate sheet 3.
If the plasma discharge comes to a close, the discharge channel reverts to an insulated state, so that a floating potential prevails such that the injected charges are held in the respective pixels by way of a so-called sample-and-hold operation. So, the discharge channel operates as an individual sampling switch element, so that the respective pixels are schematically indicated with switching symbols S1.
The liquid crystal 9 and the intermediate sheet 3, held between the signal electrodes Y1, Y2 and the discharge channel, operate as sampling capacitors. When the sampling switch S1 is turned on by line sequential scanning, picture signals are written into the sampling capacitors. The respective pixels are turned on or off responsive to the picture signal level. The signal voltage is held on the sampling capacitor even after the sampling switch S1 is turned off to perform an active matrix operation of the display device. Meanwhile, the effective voltage applied to the liquid crystal is determined by capacitance division with respect to the intermediate sheet 3.
FIG. 3 is a timing chart showing the scanning processing timing for sequentially discharging the column-shaped discharge channel and the signal processing timing for writing in respective pixels by supplying picture signals to the column-shaped signal electrodes. The routine practice is to complete the discharging of relevant discharge channels and writing of picture signals in relevant pixels within a period of selection of a sole line (scanning line).
For example, in the VGA standard display device, there are 480 lines, such that 480 discharge channels are formed. In this case, the respective lines are sequentially selected at a pre-set period (1H=horizontal period=32 xcexcs). So, the discharge period allocated to a discharge channel of each line is (1H=32 xcexcs at the maximum.
In the illustrated example, the discharging period is set to be not longer than 1H, such as to 13 xcexcs, in order to complete the discharging of the discharge channel and the writing of picture signals during the 1H period. Specifically, a selection pulse with a pulse width of 13 xcexcs is applied to discharge a discharge channel during the first half of the 1H period and picture signals are written in the latter half of the 1H period. It is because picture signals are written in the course of resetting to the original state after discharge.
In a timed relation to end of discharge for a line 1, corresponding picture signals 1 are written. In the next horizontal period, the line 2 is selected and corresponding picture signals 2 are written. In the next horizontal period, the line 3 is selected and corresponding picture signals 3 are written The line 4 then is selected to write corresponding picture signals 4. Thus, in the conventional driving method, since the selection pulse width allocated to a line is limited in the conventional driving method, there lacks tie degree of freedom in setting the discharge voltage Vu and the discharge current Iu necessary in uniform writing of picture signals.
Since stable plasma discharge is induced with a limited selection pulse width, the discharge voltage Vu and the discharge current Iu were set to higher value states with a certain allowance. In particular, if the discharge current is high, the damage to the electrode material is increased, such that practically sufficient panel durability cannot be assured.
It is therefore an object of the present invention to provide a plasma addressing display device that is free from the above-mentioned drawbacks.
The following means are used to overcome the aforementioned problems. That is, a plasma addressing display device according to the present invention includes:
a display cell having columns of signal electrodes and including a plasma cell having rows of discharge channels, with pixels formed at intersections of said signal electrodes and said discharge channels,
a scanning circuit for sequentially discharging the columns of the signal electrodes at a pre-set period to select pixels from row to row, and
a signal circuit for supplying picture signals to said columns of the signal electrodes to write said picture signals in the pixels of the selected row. The scanning circuit discharges each discharge channel with time shift as the discharging period allocated to the discharge channel of a previous row is partially overlapped at least with the discharging period allocated to the discharge channel of the next row to allocate a discharging period longer than said pre-set period to each discharge channel. In this case, the signal circuit supplies picture signals to be written in pixel in a row in question to each signal electrode in a timed relation to the end of the discharging period allocated to each discharge channel.
In a preferred embodiment of the present invention, a plasma addressing display device is such that
each discharge channel has at least an anode electrode and a cathode electrode allocated thereto and is demarcated by a partition from a neighboring discharge channel;
each partition is arranged on said cathode electrode, which cathode electrode is co-used by two neighboring discharge channels separated by said partition; and wherein
said scanning circuit applies a pre-set voltage to said cathode electrode, with the potential of the anode electrode, maintained at a grounding potential, as a reference, to cause the neighboring discharge channels to be discharged together, said scanning circuit sequentially applying a pre-set voltage to each cathode electrode with time shift from one cathode electrode to another.
Also provided is method for driving a plasma addressing display device, in which a display cell having columns of signal electrodes and a plasma cell having rows of discharge channels are layered together and in which pixels are provided at intersections of said signal electrodes and said discharge channels, said method including
scanning processing for sequentially discharging the columns of signal electrodes at a pre-set period to select pixels from one row to another and
signal processing for sequentially supplying picture signals to columns of signal electrodes in keeping with a pre-set period to write picture signals in the pixels of the selected row;
characterized in that
said scanning circuit discharges each discharge channel with a time shift as the discharging period allocated to the discharge channel of a previous row is partially overlapped at least with the discharging period allocated to the discharge channel of the next row to allocate a discharging period longer than said pre-set period to each discharge channel, Id this case, the signal circuit supplies picture signals to be written in pixel in a row in question to each signal electrode in a timed relation to the end of the discharging period allocated to each discharge channel.
According to the present invention, the discharging period allocated to a discharge channel of a previous row is partially overlapped with that allocated to the discharge channel of the next row so that the discharge channels will be discharged with a time shift. Stated differently, the scanning of the plasma cell is by the xe2x80x9cconcurrent plural line discharging system,xe2x80x9d in which at least two lines are discharged simultaneously, instead of conventional line-based discharging. With this xe2x80x9cconcurrent plural line discharging system,xe2x80x9d the discharging period allocated to each line (discharging pulse width) can be longer than the horizontal period (1H).
The result is that plasma discharge can be induced with stability in the respective discharge channels so that the discharging voltage or current necessary for uniform writing can be diminished correspondingly. The discharging voltage or current diminishing effect is larger the larger the pulse width. In particular, the plasma cell durability can be elongated by diminishing the discharging current.
It has been confirmed that, in a plasma cell built into the plasma addressing display device, the plasma cell durability is inversely proportionate to the fourth power of the discharging current. In addition, in a preferred embodiment of the present invention, the cathode electrode is formed below the partition and two mutually neighboring discharge channels are soused,
These two discharge channels may be discharged simultaneously by applying a pre-set discharging voltage to the cathode electrode. If the application of the discharge voltage to the respective cathode electrodes is sequentially shifted, e.g., by 1H, up to a maximum of 1H of the discharging time is obtained in each discharge channel. Moreover, since the time of voltage application to each cathode electrode is 1H at the maximum, it is half that in the routine system. Since the damage can be halved by halving the discharge voltage application dime to the cathode electrode, the durability can be elongated to twice that in the routine xe2x80x9cconcurrent plural line discharging system.xe2x80x9d
According to the present invention, described above, in which the xe2x80x9cconcurrent plural line discharging systemxe2x80x9d is used, discharging period longer than the horizontal period can be allocated to each discharging channel. Since the discharging period can now be longer, the discharging voltage or current required for uniform writing of picture signals can be diminished, so that it is possible to prolong the durability of the plasma cell built into the plasma addressing display device. Since the discharging current is now reduced, the power consumption of the entire panel can be decreased unless the discharging period is prolonged excessively.